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TSMC's 2nm Capacity Race: AI Orders Push Output Toward 120,000 Wafers a Month

TSMC will close out 2026 producing roughly 120,000 wafers a month on its 2nm process, a figure that clears the 90,000 to 100,000 that supply chain analysts were working with as recently as this summer. Taiwanese…

Semiconductors 1,216 words 6 min read

TSMC's 2nm Capacity Race: AI Orders Push Output Toward 120,000 Wafers a Month — Semiconductors No Image Semiconductors
Lead image · Filed 12 October 2026, 03:02

TSMC will close out 2026 producing roughly 120,000 wafers a month on its 2nm process, a figure that clears the 90,000 to 100,000 that supply chain analysts were working with as recently as this summer.

Taiwanese publication EDN reported the number on September 27, citing industry sources. The gap between the old estimate and the new one is not a rounding error. It is the difference between a node that ramps on schedule and one that ramps fast because customers cannot get enough.

The reason for the pull-forward is sitting in the purchase orders. Apple, Nvidia, AMD, Qualcomm and MediaTek have each raised their reservations for TSMC's 2nm capacity by 10% to 20%, according to Economic Daily News. The foundry answered by accelerating its buildout, and buyers should expect that acceleration to surface in their next wafer quote.

That is the stake. The cost of the AI compute that runs on-device models and flagship phones is being set by a small set of wafer contracts negotiated over the next two quarters, and the people writing those contracts are working from a supply picture tighter than the one published in the spring. Our desk has followed the foundry's advanced-node push in semiconductors coverage.

Five fabs, two cities

TSMC senior vice president Hou Yung-ching said this year that the company is bringing five 2nm fabs online in 2026, two in Hsinchu and three in Kaohsiung. That is a lot of concrete and a lot of EUV scanners inside a single calendar year.

The numbers behind the build run hotter than the headline. EDN reports Hou saying that first-year 2nm output will run 45% above what 3nm produced in its first year, and that 2nm capacity will grow at a compound annual rate of 70% from 2026 through 2028. A node that grows that fast for three straight years is not a normal semiconductor ramp. It looks more like a grid being wired than a fab being poured.

Whether the crew and tool supply can hold that curve is the question nobody answers on the record. Hiring thousands of process engineers and installing lithography tools on that schedule is the unglamorous half of the story, and it is where a 70% projection either happens or quietly slips to 50%.

September's 2nm launch wave

The demand surge is not abstract. Three flagship processors landed in September 2026, all built on TSMC's 2nm process.

Qualcomm's Snapdragon 8 Elite Gen 6 and the higher-end Snapdragon 8 Elite Extreme Gen 6 both use the node, with a redesigned Hexagon NPU and sensing hub. Qualcomm says the Extreme variant can run mixture-of-experts models with more than 30 billion parameters directly on the device. The chips will ship in phones from Honor, iQOO, Motorola, OnePlus, OPPO, Redmi, RedMagic, vivo and Xiaomi.

Apple's A20 Pro, which powers the iPhone 18 Pro and the iPhone Duo, takes a different approach. Apple says its 32-core dual neural engine delivers twice the AI processing power of the A19 Pro and lifts memory bandwidth 50%. The company also moved the memory die out of the silicon's thermal path with a side-by-side package, letting the chip connect directly to a next-generation vapor chamber. On a phone that runs a model locally, heat is the constraint, not logic.

MediaTek's Dimensity 9600 Pro splits the work across two NPUs. MediaTek says its second-generation efficiency NPU cuts power consumption for always-on AI by 40%, while the performance NPU 1090 delivers 51% faster LLM prefill and 55% more token generation per watt. The chip supports on-device models of up to 30 billion parameters. The cheaper Dimensity 9600M stays on TSMC's 3nm process, as Reuters reported when the chip launched.

Three vendors shipping 2nm silicon in the same month, each betting that buyers will pay for a phone that thinks on its own, explains the order jump at the foundry more cleanly than any analyst chart. See also our archive of chip supply reporting in /archive.

Prices move before volume does

Volume headlines hide the more immediate problem, which is money.

Korean outlet Digital Daily reported in early October that TSMC has decided to raise 2nm wafer prices by an additional 6% to 8% in the first quarter of 2027, citing rising manufacturing and electricity costs. EDN adds that mature-node prices will climb roughly 3% to 10% from January 2027.

That stacks on top of increases already booked. Digital Daily notes that 10% to 20% price rises have already been reflected for individual 2nm customers. A designer's wafer bill goes up twice in about a year, and the second increase lands before the first tranche of capacity is even sold out.

The pressure is not Taiwan-only. Reuters reported in August that SMIC negotiated higher prices for its most sought-after capacity, with the new pricing applying to third-quarter wafers. SMIC's average wafer selling price rose 5.7% quarter over quarter in the second quarter of 2026, and capacity utilization reached 93.7%. When a foundry operating under export controls can charge more, the whole floor moves.

Downstream chip suppliers are already running the math. Power management IC, driver IC and microcontroller makers are considering a second round of price hikes between late 2026 and early 2027, with increases ranging from 5% into the double digits, according to Economic Daily News.

Trucks entering and leaving TSMC Fab 18 in Kaohsiung's Southern Taiwan Science Park, May 2025

What the fab floor looks like from the road

One detail in that reporting deserves more attention than it received. IC design companies told Economic Daily News that some customers have begun pulling orders forward, and the designers themselves stress this does not reflect a broad recovery in demand. They are comparing order books against last year to gauge over-ordering before they commit shipment plans, and they are trying to avoid a repeat of the double-ordering hangover that later weighed on the IC design market.

Put plainly: some of the 2027 volume is inventory being moved earlier, and inventory moves back later. That does not make the capacity fake. It does mean the wafer count and the end-user demand are not the same number this quarter.

The buildout is visible from the highway. Trucks run in and out of TSMC's Fab 18 in Kaohsiung around the clock. In Chiayi, the newer Fab 21 site has been under construction since late 2023 as the company pushes its 2nm footprint south of Hsinchu.

TSMC Fab 21 construction site in Chiayi, November 2023

What to watch in the next two quarters

TSMC's third-quarter earnings call lands in the coming weeks, and the questions on it will match the ones the order books raise. Does 120,000 wafers a month hold into 2027, does the 70% compound growth rate survive contact with a tight labor market, and does the January price list move 3% or 10%?

My read is that the capacity number arrives on time and the price hikes arrive on time, and the wobble shows up somewhere less visible: in yields, in older nodes, in the second- and third-tier customers who cannot lock a long-term agreement. Those are the buyers who will absorb the January increase and pass it along to everyone else. TrendForce's reporting on foundry pricing pressure tracks the same squeeze, and it is worth reading alongside EDN's numbers.

Watch the January 2027 wafer price list. It will tell you more about the real state of AI chip demand than any capacity forecast.