Taiwan Semiconductor Manufacturing Co is accelerating its 2-nanometre expansion as AI and high-performance computing demand pushes customers to raise orders, according to a report by Taiwanese publication EDN.
TSMC's monthly 2nm capacity could reach about 120,000 wafers by the end of 2026, ahead of earlier expectations of 90,000 to 100,000 wafers, EDN reported Monday, citing industry sources.
The stakes are concrete. The 2nm node is the frontier that Apple, Nvidia, AMD, Qualcomm and MediaTek all need for their next generation of chips, and TSMC's ability to deliver wafers at scale this year determines whether those products ship on schedule. If the capacity lands where EDN's sources say it will, the bottleneck shifts from manufacturing to packaging and memory supply.
Five Fabs Coming Online This Year
TSMC is bringing five 2nm fabs online in 2026, two in Hsinchu and three in Kaohsiung, EDN said, citing TSMC senior vice president Hou Yung-ching.
Hou said first-year 2nm wafer output would be 45 percent higher than first-year 3nm output in 2023. He also said 2nm capacity is expected to grow at a compound annual rate of 70 percent from 2026 to 2028.
Those are big numbers, but they rest on one assumption: that customers keep raising orders. EDN reported that Apple, Nvidia, AMD, Qualcomm and MediaTek have recently raised 2nm family capacity orders by 10 to 20 percent. That is a vote of confidence, not a guarantee that the node will yield at the rates TSMC's customers need.
The Order Book Is Already Full
Wccftech reported in a separate piece that TSMC's 2nm capacity at two local plants is completely sold out for 2026, with production output targeted at 100,000 monthly wafers by next year. That figure sits below EDN's 120,000 estimate, which suggests either different plant counts or different timing assumptions between the two reports.
The gap matters. A 20,000-wafer spread at the leading node is worth billions in revenue, and it is the difference between a customer getting silicon in Q4 and waiting until Q1. Neither report attributes the difference to a specific cause, so it is best read as two independent estimates rather than a contradiction.
What This Means for Chip Buyers
For device makers, earlier access to 2nm wafers means faster phones, denser AI accelerators and more efficient data-center parts. For everyone downstream, it means the parts that depend on those wafers, advanced packaging capacity at TSMC and CoWoS lines in particular, become the next constraint.
It is not clear the packaging side can keep pace. TSMC has been expanding CoWoS capacity, but demand from AI accelerators has outstripped supply for two consecutive years. If 2nm wafers arrive faster than packages can be assembled, the wafers sit in inventory and the benefit to end buyers slips.
The AI Demand Behind the Numbers
The driver is not a mystery. AI training and inference clusters consume the most advanced silicon available, and TSMC is the only foundry shipping at volume at the leading edge. When Nvidia, AMD and the custom silicon teams at the hyperscalers all want the same node in the same quarter, the foundry's capacity becomes the scarce resource.
That scarcity shows up in pricing. Leading-edge wafer prices have risen with each node, and 2nm is no exception. Customers raising orders 10 to 20 percent are not doing so because wafers got cheaper; they are doing it because the alternative, staying on 3nm, costs more in power and performance.
Yield Is the Open Question
Capacity on paper and silicon in hand are different things. TSMC has not published 2nm yield figures, and the history of recent nodes suggests the first year of a new process is usually the hardest. The 45 percent first-year output advantage over 3nm is a plan, not a result.
If yields come in low, the 120,000-wafer target turns into a smaller number of usable dies, and the customers who raised orders will face allocation fights anyway. That risk is real, and it is the reason Apple and Nvidia have reportedly been qualifying Samsung's foundry as a second source, even though Samsung's 2nm yields have also been questioned.
Geopolitics Hangs Over the Ramp
TSMC's fabs are in Taiwan, and the cross-strait situation has not changed. A capacity ramp concentrated in Hsinchu and Kaohsiung is efficient and fast, but it leaves the global supply of leading-edge chips exposed to a single geography.
The Arizona fab TSMC is building will not produce 2nm this year, and Japan's Kumamoto plant is on a different node. Customers know this. It is one reason the order increases are happening now rather than later: locking in Taiwan capacity early is cheaper than scrambling for alternatives later.
How This Compares to 3nm
TSMC's 3nm ramp in 2023 started slower and cost more per wafer than the company planned, and the first year of output was constrained by yield. The 2nm plan is being presented as the opposite: higher first-year output, faster capacity growth, and customer orders already in hand before the first fab ships a commercial wafer.
Whether that holds depends on how similar 2nm's process challenges are to 3nm's. FinFET to gate-all-around is a real architecture change, and the new transistor structure is harder to manufacture at scale than the marketing suggests. TSMC has run this playbook before, though, and its 3nm problems were partly self-inflicted by an over-ambitious first-year target. The 2nm target is aggressive too, but the company has more experience with the transition now.
What to Watch Next
Three things will tell whether the 120,000-wafer figure holds. First, TSMC's own guidance on its next earnings call, which is the only source that carries contractual weight. Second, yield reports from the Hsinchu and Kaohsiung lines, since a node can have capacity and still miss output if yield lags. Third, whether packaging capacity expands in parallel, or becomes the new choke point.
None of those are settled yet. For now, the most concrete fact on the table is that TSMC's 2nm ramp is running ahead of plan, and its biggest customers have already locked in more capacity than they originally asked for.
For more on semiconductor capacity and the foundry market, see Reuters semiconductor coverage. Related reading on this site: Semiconductors category.