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China's CXMT Reaches a DRAM Node Parity Its Rivals Thought Export Controls Had Blocked

For most of the last decade, the consensus among analysts of the global memory industry was straightforward. China's domestic DRAM champion, ChangXin Memory Technologies (CXMT), was making progress, but slowly, and its…

Semiconductors 2,873 words 14 min read By News Editorial Desk

China's CXMT Reaches a DRAM Node Parity Its Rivals Thought Export Controls Had Blocked — Semiconductors No Image Semiconductors
Lead image · Filed 2 October 2026, 02:45

China's CXMT Reaches a DRAM Node Parity Its Rivals Have Long Assumed Export Controls Could Stop

Introduction

For most of the last decade, the consensus among analysts of the global memory industry was straightforward. China's domestic DRAM champion, ChangXin Memory Technologies (CXMT), was making progress, but slowly, and its path forward ran straight through a wall that Washington had spent billions of dollars and considerable diplomatic capital building: restrictions on the export of advanced chipmaking equipment, above all the extreme-ultraviolet lithography machines that only a single European supplier sells.

That consensus is now out of date. In a span of barely two weeks, CXMT announced that its LPDDR6 mobile memory had entered mass production for a flagship Xiaomi smartphone, and then that its fifth-generation DRAM manufacturing platform was also shipping in volume. The company claims the new process delivers a 50% larger die yield per wafer than its previous generation, achieved at an active-area half-pitch of 11.95 nanometres — a figure that, by the industry's usual shorthand, puts it in the same generation as the most advanced nodes in mass production anywhere in the world.

That claim deserves scrutiny rather than either celebration or dismissal, because the technical route CXMT took to get there is genuinely unusual and has direct consequences for how policymakers should think about export controls as a technology policy. But the more strategically important development of the past month is not the process node at all. It is the direction of travel: CXMT is preparing to enter NAND flash, and its domestic rival YMTC is sampling DRAM. China's two "twin stars" of memory are moving into each other's territory, and the reason is a global shortage that industry executives expect to persist through at least 2027.

This is a story about a fourth DRAM pole arriving, and about the uncomfortable symmetry that both Washington and Beijing are now restricting advanced technology flows in the same direction.

What CXMT Actually Announced, and What the Numbers Mean

The most concrete claims came from Luo Xiaodong, CXMT's vice president and head of its marketing centre, who spoke at the 2026 World Manufacturing Convention in Hefei in September. The company's fifth-generation platform, which it calls G5, uses self-aligned quadruple patterning — a technique in which a sequence of masking and etching steps is repeated to create features smaller than a single conventional lithographic exposure could produce. The result is an active-area half-pitch of 11.95 nanometres.

To put that number in context, this is the class of node that leading-edge foundries have used for the most demanding logic and memory products over the past several years. CXMT's stated method of reaching it, however, is not the method its competitors used. The company developed the platform through computer simulation and joint work with domestic Chinese chip-equipment makers on the critical production steps. Export controls did not prevent that work; they redirected it.

There is a second, more commercially meaningful figure in the announcement. CXMT says the G5 platform can produce at least 50% more gross die per wafer than its fourth generation, measured against an 8-gigabit baseline. Gross die is the potential number of chips cut from a wafer before defective units are excluded, so it is a capacity metric rather than a quality metric — but in a memory business that is currently capacity-constrained, it is the number buyers care about most. Each wafer processed yields more saleable units, which is exactly the axis along which a company competing without the newest lithography equipment must win.

Alongside the platform, CXMT introduced two 24-gigabit LPDDR5X products built on it, offered in two package formats. Each holds 50% more data than CXMT's previous equivalent part, and the company said both were already in mass production. The LPDDR6 announcement came a fortnight earlier and is aimed at the same mobile market. This is a company that has moved from technical demonstration to commercial shipment remarkably fast, and the shipment channel — a leading Chinese smartphone brand — is a meaningful one.

The Toolset Problem, and Why It Did Not Stop the Node

The most obvious objection to CXMT's node claim is that the company is not buying ASML's EUV systems. That is true, and it is the entire strategic question.

Standard extreme-ultraviolet lithography prints a pattern in a single exposure, dramatically reducing the number of process steps a chip requires. Without it, a manufacturer trying to reach small features must do more work: more masks, more deposition and etch steps, more chances to introduce defects, and higher cost per good die. Quadruple patterning is a real and legitimate method of achieving fine features, and it is used in industry — but it is used as a bridge, not as a permanent answer, because the cumulative process complexity compounds.

What CXMT's G5 shows is that the compounding has not yet become prohibitive. A company with a deep process-engineering bench, a domestic equipment supply chain that is improving quickly, and a captive market willing to accept non-leading-edge performance can buy node parity with enough process steps. The relevant comparison is not with a fab running EUV at full utilisation; it is with the counterfactual of no G5 platform at all, which is what a total denial of equipment access would have produced.

The pattern is worth stating plainly, because it is a general lesson about export control design: blocking one specific machine blocks a specific trajectory, not the capability. As CommonWealth Magazine's analysis of the CXMT breakthrough put it, blocking one manufacturing tool does not necessarily freeze technological progress. The same outlet had previously examined how CXMT narrowed the gap with Micron despite being unable to buy EUV lithography, and the G5 platform is the latest data point in that series.

There is a real cost to this substitution, and it should not be waved away. More process steps mean more mask sets, more chemicals, more energy, and more equipment to buy — all of which require capital that a company with constrained access to foreign suppliers may not have in equal quantity. It also means yield learning curves that take longer. CXMT has solved the node problem; it has not solved the cost-per-good-die problem, and the two are not the same thing.

The Fourth Pole, and the Gap That Actually Matters

TrendForce data cited by CommonWealth put CXMT's share of global DRAM revenue at 9.5% in the second quarter of 2026, up from 7.6% in the previous quarter. Samsung remained first at 39.4%, followed by SK Hynix at 24.9% and Micron at 23.3%. That is a meaningful position — a genuine fourth supplier, not a rounding error — and the quarter-over-quarter gain is the fastest of any of the four.

But revenue share is not the metric that matters most for the AI era, and the industry's own analysts are clear about the distinction. High-bandwidth memory, the stacked DRAM placed alongside AI processors, is where the technology gap remains widest. TrendForce said earlier in 2026 that Chinese HBM suppliers were still in the early stages of customer verification. CXMT has been targeting HBM3-class products and advanced packaging, but technical barriers and localisation requirements have delayed large-scale production.

Marina Zhang, an associate professor at the University of Technology Sydney, told The Straits Times that CXMT still faces three major hurdles: market share, technology generation, and advanced HBM. Her assessment was that a genuine fourth pole is a hopeful scenario for the medium-to-long term, not yet a done deal. Counterpoint Research director MS Hwang expected CXMT to begin narrowing the HBM gap from late 2026, but agreed it remains behind the leaders today.

That gap is commercially decisive. HBM is the memory an AI accelerator cannot ship without, and it is where hyperscaler procurement is concentrated. A fourth pole in conventional server DRAM is meaningful for the broader market; a fourth pole in HBM would be a different order of event. Investors appear to know the difference. CXMT's July listing on Shanghai's STAR Market was Asia's largest IPO of 2026, raising 57.92 billion yuan, and the shares opened at 49.50 yuan against an 8.66 yuan offer price — a 470% first-day gain that made it China's most valuable listed company. The market valued it at roughly half the combined valuation of Micron and SK Hynix on a fraction of the market share.

The other strategic point Zhang made is the one that most changes how the story should be framed. China's immediate interest in domestic DRAM lies largely in scale and supply security rather than in reaching the absolute performance frontier. Domestic production at scale, she said, ensures that China's AI servers do not grind to a complete halt under sanctions. That reframes the whole question. CXMT does not need to be the fastest memory in the world to be strategically significant; it needs to be available in volume when the alternative is not.

The Real Story: Two Chinese Memory Makers Swapping Territories

The more consequential strategic development of the past month has nothing to do with lithography nodes. In mid-September, Reuters reported that CXMT is preparing to enter the NAND flash market — setting up a research-and-development production line at its new plant in Beijing, establishing a research institute in the capital with NAND among its projects, and discussing plans with at least one startup customer intending to use CXMT NAND in storage products for AI systems and supercomputers.

This puts CXMT head-to-head not only with Samsung, SK Hynix and Micron, but with YMTC, its own domestic counterpart. The two firms, known in China as the country's "twin stars" of memory, have until now occupied cleanly separate markets: CXMT dominates Chinese DRAM, YMTC leads Chinese NAND. That separation is dissolving. Reuters reported in April that YMTC had sent low-power DRAM samples to customers while weighing entry into CXMT's core market, and EE Times reports that YMTC expects customer feedback by the end of 2026 to decide whether to proceed.

The reason both are moving now is a shortage with an unusual property. SK Hynix's CEO Kwak Noh-jung said in July that 2027 could be the industry's worst year from a supply perspective. TrendForce expects NAND supply tightness to ease only in the second half of next year. The cause is straightforward: the Big Three have concentrated capital spending on DRAM and HBM, leaving NAND capacity additions deliberately limited — so the segment everyone deprioritised is now the one with no slack.

For Chinese customers, tight supply has done something unusual: it has strengthened the twin stars' pricing power to the point where, in some cases, they have charged more than their foreign competitors. A company that is simultaneously a national champion and, on occasion, the most expensive supplier is an unusual position, and it is a direct consequence of the shortage rather than of superior technology.

There is a deeper strategic logic too. As EE Times notes, dual DRAM-and-NAND portfolios let manufacturers shift capital between segments to absorb downturns — the reason Samsung, SK Hynix and Micron have all pursued both. A one-stop domestic shop would give Chinese device makers a single qualified supplier, and would remove the single-supplier vulnerability that currently exists on both sides of the divide. It would also, as EE Times observed, generate friction over the domestic distribution of equipment, cleanroom tooling quotas, and specialised engineering talent, between two firms backed by competing provincial governments — CXMT by Hefei in Anhui, YMTC by Wuhan in Hubei.

The technical difficulty is substantial, and EE Times' assessment is worth taking seriously. NAND is among the most capital-intensive undertakings in the industry, requiring distinct tooling configurations, separate chemical supply chains, and entirely different patent architectures from DRAM. The manufacturing challenges — film stack deposition, channel etch, word line fill — are not incremental refinements of what CXMT already does. Moving from an R&D line to commercially competitive volume production would be a substantial technical and financial undertaking, and CXMT has announced neither a capacity target nor a production timetable.

The export control overlay makes it harder still. Washington placed YMTC on the Entity List in 2022, and CXMT itself was designated a "Chinese Military Company" by the US Department of Defense in June, with Reuters reporting that an interagency committee had approved it for Entity List addition though that had not been implemented. Even a company sitting on 57.92 billion yuan of IPO proceeds operates inside a procurement environment that can be closed to it without notice.

What This Means for Everyone Else

The competitive effects of CXMT's rise do not fall evenly, and the parties most exposed are not the ones most frequently discussed.

The Big Three retain overwhelming leadership. Samsung at 39.4% of DRAM revenue, SK Hynix at 24.9%, and Micron at 23.3% are not being displaced. They are, however, being compelled to choose between serving AI demand at the margin and serving the conventional segments where a fourth supplier is now credible — and the memory industry has a long history of prices rising faster than volumes in exactly that configuration.

Taiwan's memory sector is arguably more exposed than the Korean incumbents. Taiwan has no DRAM producer comparable in scale to Samsung or SK Hynix; its memory industry consists of Nanya Technology, Winbond, and Micron's substantial island operations. Those companies compete in the mature and specialty categories where CXMT's growing scale applies most directly, which is why the shift shows up in our semiconductors coverage as a pricing story before it shows up as a technology story. The AI boom has flattered them — capacity shifting toward HBM has produced shortages in older DRAM products, and Taiwanese producers have benefited. But if Chinese DRAM becomes competitive on price, performance and reliability, they face a much larger competitor in precisely the segments where they have recently been earning scarcity rents. TrendForce has already found international PC and electronics brands increasingly validating Chinese component suppliers as shortages and high prices force them to diversify procurement.

The precedent from Taiwan's own history is instructive. Counterpoint's Hwang pointed to what happened after 2008, when shrinking market share weakened Taiwan's local DRAM manufacturers' ability to finance increasingly expensive fabs and technology upgrades. That is the line CXMT has to cross. Its advantages over previous challengers are substantial: enormous domestic demand, government backing, access to capital after a record IPO, and a rapidly expanding manufacturing base. Its disadvantages are equally real — a technology gap concentrated in the highest-margin product, and export controls that can be tightened without notice.

One further note on the export control trajectory. Both governments are now restricting advanced technology flows, and the direction of travel is toward mutual restriction rather than liberalisation. The pattern set by the US is being followed by China's own controls on critical minerals and technology outflows. For an industry built on a global supply chain with extraordinarily high fixed costs, that is a structural change in how capacity gets built, not a temporary disruption.

Conclusion

CXMT's fifth-generation DRAM platform is a real technical result, and the more useful reading of it is neither "China has caught up" nor "export controls have failed." It is that node parity and cost parity are different achievements, and only the first has been demonstrated. Reaching 11.95-nanometre half-pitch without EUV, using quadruple patterning and domestic equipment, is a genuine engineering accomplishment that will be commercially sustainable only if yield and cost-per-die follow.

The strategic picture is clearer than the technical one. China now has a DRAM champion at 9.5% revenue share and climbing, funded by the largest IPO in Asia this year, with a captive market, state backing, and a supply-security rationale that does not depend on winning the performance race. It is preparing to move into NAND at the same time its domestic rival samples DRAM, because a shortage that will not ease until the second half of 2027 has made both moves worth making. As both suppliers find they can charge above foreign rivals in a tight market, the twin stars are accumulating the capital and customer qualification that scale requires.

The question that matters for the rest of the industry is no longer whether China can manufacture competitive DRAM. It is whether CXMT can achieve enough scale to finance the next technological leap, before Samsung, SK Hynix and Micron rebalance their own capacity in a way that closes the window. On the current trajectory, the answer to the first question is arriving faster than most observers expected.

Images

A Kingston FURY Impact DDR5 SO-DIMM laptop memory module, the kind of conventional DRAM product now being contested in the smartphone market

A Micron DDR5 RDIMM server memory module, shown with its DRAM packages visible — the sort of module where a fourth qualified supplier would eventually matter

A patterned 300mm silicon wafer showing the dense die array before individual chips are cut apart

A magnified view of a patterned silicon surface, showing the repeated cell structures and deposited layers that the half-pitch figure describes

References